The present disclosure relates to nanoscale fabrication of fin-type field effect transistors (FinFETs). Particularly, the present disclose relates to using sidewall image transfer (SIT) to fabricate quadruple frequency fins.
The continued reduction in feature sizes of complementary metal oxide semiconductor (CMOS) integrated circuits (ICs) requires ever greater accuracy in fabrication methods to form smaller features. Conventionally, photolithographic processes are used to fabricate the features of CMOS ICs. However, the resolution of photolithographic processes is limited by the wavelength of the light and the optics used in fabrication.
Spatial resolution is best described by the concept of pitch. Pitch is defined as the distance between identical points in two neighboring features, e.g., neighboring lines, in a repeating pattern of the IC. The two neighboring features are separated by a space, which may be filled by a material, e.g., an insulator. Pitch may also be defined as the sum of the width of a feature and the width of the space on one side of the feature. A particular photolithographic process is limited to a minimum pitch that precludes further reduction in feature size.
A particular photolithograph process is also characterized by a node technology in CMOS semiconductor device fabrication. For example, a 32 nm node technology, which typically uses deep ultraviolet (DUV) light, refers to the 32 nm average half-pitch between two identical points on neighboring features. Thus, the 32 nm node technology can reliably fabricate features, e.g., a space in a protective layer, having a half-pitch of 50 nm.
Frequency doubling, or pitch doubling by sidewall image transfer (SIT), is a well-known method of extending the capabilities of nanoscale fabrication beyond the limits of the minimum pitch of a photolithographic process to a “sub-photolithographic” pitch. In conventional SIT, a number of mandrels are first patterned above a semiconductor substrate by a photolithographic process using a near minimum pitch. A pair of sidewalls is then formed on the two sides of each mandrel, where the width of each sidewall is considerably less than the space between the mandrels. The mandrels are removed from between the pairs of sidewalls by selective etching, resulting in a number of sidewalls that is double the number of mandrels. Thus, a frequency doubling of the number sidewalls relative to the number of mandrels results within the near minimum pitch. The sidewalls are used to mask the underlying semiconductor substrate during a subsequent selective etch of the semiconductor substrate. After the masking sidewalls are removed, an average sub-photolithographic pitch equal to ½ of the near minimum pitch characterizes the semiconductor features.
To quadruple the number of semiconductor features within the near minimum pitch, it is only required to subject each of the original sidewalls to the formation of secondary sidewalls and to then remove the original sidewalls by selective etching. In this manner, a frequency quadrupling of the number of secondary sidewalls semiconductor occurs, whose pattern can then be transferred to the underlying semiconductor substrate, i.e., the frequency doubling method is applied twice to achieve frequency quadrupling of the semiconductor features.
Although the spatial resolution of photolithographic processes is of great importance, of equal importance is the accuracy of overlay. Overlay is a measure of the photolithography system's capability to print layers accurately on top of each other. Overlying features of layers or masks must be accurately aligned to the features of an underlying layer. Overlay is a measure of the accuracy of this alignment. The smaller the feature size, the more accurately one must align successive layers. For example, current photolithographic fabrication of a repeating semi-conductor feature having a 50 nm pitch requires an overlay accuracy of about 7 nm.
There remains a need for frequency quadrupling of the smaller features of a complementary metal oxide semiconductor (CMOS) integrated circuit (IC) that uses current photolithographic fabrication processes with an overlay that is scaled to the frequency quadrupling.